An embodiment of the present invention relates to a nonvolatile memory device and, more particularly, to a nonvolatile memory device and a method of programming the same, which are capable of controlling a channel boosting level by controlling a pass voltage when performing a program operation.
There is an increasing demand for nonvolatile memory devices which can be electrically programmed and erased and can retain their data even without the supply of power. To develop high-capacity memory devices capable of storing a large amount of data, technology for the high integration of memory cells is being developed. For the high integration of memory cells, a memory device is proposed in which a plurality of memory cells coupled in series forms one string and a plurality of strings forms one memory cell array.
In general, a nonvolatile memory cell includes a gate in which a tunnel insulating layer, a floating gate, a dielectric layer, and a control gate are stacked over a semiconductor substrate and junction regions formed on both sides of the gate over the semiconductor substrate. When hot electrons are injected into the floating gate, a program operation is performed, and when electrons injected into the floating gate are discharged by F-N tunneling, an erase operation is performed.
FIG. 1A is a cross-sectional view of a unit string of a nonvolatile memory device.
Referring to FIG. 1A, the unit string of a nonvolatile memory device includes memory cells MC0 to MC31 coupled in series between a drain select transistor DST for selecting a unit string and a source select transistor SST for selecting the ground. Each of the memory cells has a gate in which a floating gate and a control gate are stacked.
The string is coupled to a bit line BL (not shown in FIG. 1A). A number of structures, each having their string and bit lines coupled together, are coupled in parallel to form one block. The blocks are symmetrically arranged about a bit line contact. The select transistors DST and SST and the memory cells MC0 to MC31 are arranged in rows and columns in a matrix configuration. A drain select line DSL and a source select line SSL are respectively coupled to the gates of the drain select transistors DST and the gates of the source select transistors SST which are arranged in the same column. 0th to thirty-first word lines WL0 to WL31 are respectively coupled to the gates of the memory cells MC0 to MC31 arranged in the same column. Furthermore, the bit line BL is coupled to the drain of each of the drain select transistors DST, and a common source line CSL (not shown in FIG. 1A) is coupled to the sources of the source select transistors SST.
A programming operation of the nonvolatile memory device constructed as above is described below.
To perform a program operation, a voltage of 0 V is supplied to a selected bit line, and a program voltage Vpgm is supplied to a selected word line. Accordingly, the electrons of a channel area are injected into the floating gate by Fowler-Nordheim (F-N) tunneling, which occurs due to a great difference in the voltage between the channel area and the control gate of a selected memory cell.
The program voltage Vpgm is supplied to not only the selected memory cell, but also to the unselected memory cells arranged in the same word line. Consequently, the unselected memory cells coupled to the same word line can also be programmed. This phenomenon is called program disturbance.
To prevent such program disturbance, the sources of the drain select transistors DST of strings, including unselected memory cells coupled to the selected word line and unselected bit lines, are charged to a voltage level (Vcc-Vth) (where Vcc is a power source voltage and Vth is the threshold voltage of the drain select transistor), the program voltage Vpgm is supplied to the selected word line, and a pass voltage Vpass is supplied to the unselected word lines. Accordingly, the channel voltage Vch of memory cells belonging to the same string is boosted, and that the unselected memory cells are prevented from being programmed.
For example, when the twenty-ninth word line WL29 is selected, as shown in FIG. 1A, if the program voltage Vpgm is supplied to the twenty-ninth word line WL29, the pass voltage Vpass is supplied to the remaining word lines, and the drain select transistor DST and the source select transistor SST are turned off, channel boosting occurs in the channel area of a string coupled to an unselected bit line. Accordingly, the unselected memory cells can be prevented from being programmed because a channel is formed, as shown in FIG. 1A, and a channel voltage is raised. To this end, channel boosting needs to be effectively performed.
Further, when most of the memory cells constituting a string are programmed, channel boosting is reduced. To prevent this problem, voltages can be supplied to the word lines as follows.
FIG. 1B is a diagram illustrating the supply of voltages to word lines according to an erase area self-boosting (FASB) method in a nonvolatile memory device.
Referring to FIG. 1B, to prevent a reduction in the boosting of a programmed cell, the twenty-eighth word line WL28 (i.e., a word line on the part of the SSL line of the twenty-ninth word line WL29 for a program) is turned off, thereby forming a low channel boosting area between the 0th and twenty-eighth word lines WL0 and WL28 and a high channel boosting area between the twenty-ninth and thirty-first word lines WL29 to WL31.
FIG. 2 is a graph showing a relationship between a channel boosting level and a program disturbance.
Referring to FIG. 2, if the pass voltage Vpass is supplied in a time period called a pass voltage (Vpass) window, channel boosting normally occurs, and so a program disturbance does not occur. Furthermore, if the pass voltage belongs to periods A, B, and FN, a tunneling program disturbance can occur because a channel boosting level is lowered. If the pass voltage belongs to periods C and D, a program disturbance resulting from the injection of hot electrons can occur because the channel boosting level has been raised.
Accordingly, controlling the pass voltage Vpass supplied to a word line for channel boosting to prevent a program disturbance is an important factor in improving the reliability of data of a memory device.